
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;

entity decoder74138nxu is 
 port( in_1: in std_logic;
       in_2: in std_logic;
       in_3: in std_logic;
       in_4: in std_logic;
       in_5: in std_logic;
       in_6: in std_logic;
       out_1: out std_logic;
       out_2: out std_logic;
       out_3: out std_logic;
       out_4: out std_logic;
       out_5: out std_logic;
       out_6: out std_logic;
       out_7: out std_logic;
       out_8: out std_logic
     );
end entity decoder74138nxu;

architecture one of decoder74138nxu is

 component decoder74138 
 port( g1,g2,g3: in std_logic;
         datain: in std_logic_vector(0 to 2);
         y: out std_logic_vector(0 to 7));
 end component;

 signal nxu_in1 :  std_logic_vector(0 to 2);  
 signal nxu_out1:  std_logic_vector(0 to 7); 
 begin
  nxu_in1 <= in_4&in_5&in_6;
  d138map: decoder74138 port map(g1=>in_1,g2=>in_2,g3=>in_3,
                                 datain=>nxu_in1,y=>nxu_out1);
  out_1 <= nxu_out1(0);
  out_2 <= nxu_out1(1); 
  out_3 <= nxu_out1(2);
  out_4 <= nxu_out1(3);
  out_5 <= nxu_out1(4);
  out_6 <= nxu_out1(5); 
  out_7 <= nxu_out1(6);
  out_8 <= nxu_out1(7);

end architecture one;

--******************************************************
 --Copyright NXU AGL (2004-2007)
 
 --Powered by scicos-hdl 0.4 ZhangDong&KangCai 2007 NXU
 
 --http://scicoshdl.sourceforge.net
 
--******************************************************
