
 library ieee;
 use ieee.std_logic_1164.all;
 use ieee.std_logic_signed.all;

 entity buma876nxu is 
  port( in_1: in std_logic;
        in_2: in std_logic;
        in_3: in std_logic;
        in_4: in std_logic;
        in_5: in std_logic;
        in_6: in std_logic;
        in_7: in std_logic;
        in_8: in std_logic;
        out_1: out std_logic;
        out_2: out std_logic;
        out_3: out std_logic;
        out_4: out std_logic;
        out_5: out std_logic;
        out_6: out std_logic;
        out_7: out std_logic;
        out_8: out std_logic);
 end entity buma876nxu;

 architecture krtl of buma876nxu is

 component buma876 
 port( a: in std_logic_vector(7 downto 0);
       y: out std_logic_vector(7 downto 0));
 end component;

 signal nxubumaDIn: std_logic_vector(7 downto 0);
 signal nxubumaDOu: std_logic_vector(7 downto 0);

 begin

 nxubumaDIn <= in_1&in_2&in_3&in_4&in_5&in_6&in_7&in_8;

 map79p: buma876 port map(a=>nxubumaDIn,y=>nxubumaDOu);

 out_1 <= nxubumaDOu(7);
 out_2 <= nxubumaDOu(6);
 out_3 <= nxubumaDOu(5);
 out_4 <= nxubumaDOu(4);
 out_5 <= nxubumaDOu(3);
 out_6 <= nxubumaDOu(2);
 out_7 <= nxubumaDOu(1);
 out_8 <= nxubumaDOu(0);
 end krtl;


--******************************************************
 --Copyright NXU AGL (2004-2007)
 
 --Powered by scicos-hdl 0.4 ZhangDong&KangCai 2007 NXU
 
 --http://scicoshdl.sourceforge.net
 
--******************************************************

