
library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_signed.all;
 
entity hamdec is 
  port( data_in: in std_logic_vector(7 downto 0);
        ham_in:  in std_logic_vector(3 downto 0);
        errork:   out std_logic;
        data_out: out std_logic_vector(7 downto 0));
end hamdec;

architecture one of hamdec is

  signal temp :  std_logic_vector(3 downto 0);

  begin
 
    temp(3)<=ham_in(3) xor data_in(7) xor data_in(6) xor data_in(4) 
             xor data_in(3) xor data_in(1);
    temp(2)<=ham_in(2) xor data_in(7) xor data_in(5) xor data_in(4) 
             xor data_in(2) xor data_in(1);
    temp(1)<=ham_in(1) xor data_in(6) xor data_in(5) xor data_in(4) 
             xor data_in(0);
    temp(0)<=ham_in(0) xor data_in(3) xor data_in(2) xor data_in(1) 
             xor data_in(0);

    p1: process(temp,data_in)
      begin
       data_out<=data_in;
        case temp is
          when "0000" => 
              errork<='0'; 
          when "0001" => 
              errork<='1';
          when "0010" => 
              errork<='1'; 
          when "0100" => 
              errork<='1';
          when "1000" => 
                errork<='1'; 
          when "0011" => 
              errork<='1'; 
              data_out(7)<=not data_in(7);
          when "0101" => 
              errork<='1'; 
              data_out(6)<=not data_in(6);
          when "0110" => 
              errork<='1'; 
              data_out(5)<=not data_in(5);
          when "0111" => 
              errork<='1'; 
              data_out(4)<=not data_in(4);
          when "1001" => 
              errork<='1'; 
              data_out(3)<=not data_in(3);
          when "1010" => 
              errork<='1'; 
              data_out(2)<=not data_in(2);
          when "1011" => 
              errork<='1'; 
              data_out(1)<=not data_in(1);
          when "1111" => 
              errork<='1'; 
              data_out(0)<=not data_in(0);
          when others =>
              errork<='1'; 
              data_out<= "00000000";
        end case;
   end process p1;

 end one;
 
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